Sail to Alaska with IEEE-USA! IEEE-USA's cruising saga continues in 2024 to the magnificent, wild Alaskan frontier. Building off of the success of IEEE-USA’s 50th Anniversary Cruise, IEEE-USA will be hosting a 7-night Alaska Cruise 9-16 September 2024. We’ll be cruising in style aboard Royal Caribbean’s Quantum of the Seas from Seattle to stops in Sitka, Skagway, Juneau, and Victoria, BC, before concluding our cruise back in Seattle. Please remember that to participate in the IEEE-USA Alaska Cruise activities, you must book through the (https://cruise.ieeeusa.org). Details: (https://cruise.ieeeusa.org/) Bldg: Smith Cove Cruise Terminal at Pier 91, Port of Seattle, 2001 West Garfield Street, Seattle, Washington, United States, 98119

This talk will provide an overview of deep learning applications in nanophotonic device design, focusing on generative neural networks. To achieve inverse design in nanophotonics, optimization of tens of thousands of 'pixels' is typically required. The adjoint method, a popular local optimization approach, often necessitates multiple optimization runs. Generative deep learning builds on existing data to generate new designs with specified target specifications such as transmission/reflection spectra. For instance, datasets optimized for discrete wavelengths (e.g., wavelength splitters) or splitting ratios (e.g., power splitters) can be used to generate devices with arbitrary wavelength or splitting ratios. We demonstrate examples using conditional variational autoencoders (CVAE) and denoising diffusion probabilistic models (DDPM) for applications in planar waveguide devices, metasurface gratings, and plasmonic gratings. Additionally, we introduce the concept of latent space optimization and transfer learning. Speaker(s): Keisuke Agenda: 5:00 - 5:30 PM Assembly and buffet dinner 5:30 - 6:30 PM Presentation 6:00 - 7:00 PM Networking Room: 6A-106, Nokia Bell Labs, 600 Mountain Ave, Murray Hill, New Jersey, United States, 07974

(https://ieeeboston.org/event/pythonapplications/?instance_id=3232) Course Kick-off / Orientation 6:00PM - 6:30PM EDT; Thursday, August 29, 2024 Live Workshops: 6:00PM – 7:30PM EDT; Thursdays, September 5, 12, 19, 26 Registration is open through the last live workshop date. Live workshops are recorded for later use. Registration Fees: IEEE Member Early Rate (August 28): $190.00 IEEE Member Rate (after August 28): $285.00 IEEE Non-Member Early Rate (by August 28): $210.00 IEEE Non-Member Rate (after August 28): $315.00 Decision to run/cancel course: Thursday, August 22, 2024 Course information will be distributed by Wednesday August 28, and then a brief live Orientation meeting will be held on Thursday August 29 ahead of the weekly live workshops that follow. Attendees will have access to the recorded session and exercises for two months (until November 26, 2024) after the last live session ends! This is a hands-on course combining pre-recorded lectures with live Q&A and workshop sessions in the popular and powerful open-source Python programming language. Pre-Recorded Videos: The course format has been updated to release pre-recorded video lectures that students can watch on their own schedule, and an unlimited number of times, prior to live Q&A workshop sessions on Zoom with the instructor. The videos will also be available to the students for viewing for up to two months after the conclusion of the course. Overview: Dan provides simple, straight-forward navigation through the multiple configurations and options, providing a best-practices approach for quickly getting up to speed using Python for modelling and analysis for applications in signal processing and digital design verification. Students will be using the Anaconda distribution, which combines Python with the most popular data science applications, and Jupyter Notebooks for a rich, interactive experience. The course begins with basic Python data structures and constructs, including key “Pythonic” concepts, followed by an overview and use of popular packages for scientific computing enabling rapid prototyping for system design. During the course students will create example designs including a sigma delta converter and direct digital synthesizer both in floating point and fixed point. This will include considerations for cycle and bit accurate models useful for digital design verification (FPGA/ASIC), while bringing forward the signal processing tools for frequency and time domain analysis. Jupyter Notebooks: This course makes extensive use of Jupyter Notebooks which combines running Python code with interactive plots and graphics for a rich user experience. Jupyter Notebooks is an open-source web-based application (that can be run locally) that allows users to create and share visually appealing documents containing code, graphics, visualizations and interactive plots. Students will be able to interact with the notebook contents and use “take-it-with-you” results for future applications in signal processing. Target Audience: This course is targeted toward users with little to no prior experience in Python, however familiarity with other modern programming languages and an exposure to object-oriented constructs is very helpful. Students should be comfortable with basic signal processing concepts in the frequency and time domain. Familiarity with Matlab or Octave is not required, but the equivalent operations in Python using the NumPy package will be provided for those students that do currently use Matlab and/or Octave for signal processing applications. Benefits of Attending / Goals of Course: Attendees will gain an overall appreciation of using Python and quickly get up to speed in best practice use of Python. All set-up information for the installation of all tools will be provided before the start of class. Speaker(s): Dan Boschen , Agenda: Topics / Schedule: Pre-recorded lectures (3 hours each) will be distributed Friday prior to all Workshop dates. Workshop/ Q&A Sessions are 6pm-7:30pm on the dates listed below: Kick-off / Orientation: Thursday, August 29, 2024 Thursday, September 5, 2024 Topic 1: Intro to Jupyter Notebooks, the Spyder IDE and the course design examples. Core Python constructs. Thursday, September 12, 2024 Topic 2: Core Python constructs; iterators, functions, reading writing data files. Thursday, September 19, 2024 Topic 3: Signal processing simulation with popular packages including NumPy, SciPy, and Matplotlib. Thursday, September 26, 2024 Topic 4: Bit/cycle accurate modelling and analysis using the design examples and simulation packages Virtual: https://events.vtools.ieee.org/m/422879

This seminar will discuss recent demonstrations of record high-speed laser communications links from Earth to a satellite in low-Earth orbit. Speaker(s): Jesse Chang Agenda: 6:00 pm Networking starts 6:15 pm Light meals served 7:00 pm Seminar starts Bldg: Forbes Rd. Cafeteria, MIT Lincoln Laboratory, 3 Forbes Rd, Lexington, Massachusetts, United States, 02421

Regular ExCom meeting Agenda: Agenda IEEE Buffalo Section Executive Committee Meeting Agenda 6:30 PM, Thursday, September 12, 2024 In Person (SUNY Buffalo State University, Technology Building 148) Virtual on Zoom 1) Call to Order 2) Review minutes from July 2, 2024 meeting (Vasili) 3) Review treasurer report (Mike W) 4) Review Membership Report (Mike W) a. Upcoming Events 1. Presentations for September – October 2. BNP Young Professionals – Ilya and Huamin 5) Action Items from July Meeting 1. Discussion on elections – Judy, John, Padma, Sam 2. Revision of Section Operations Manual – Kyle, Vasili 3. Advertisement on social media (Greg) 6) Membership/Society a. EDS b. Computer c. Control d. Communication e. TEMS f. AP/MTT g. PES h. Women in Engineering i. Young Professionals j. Life Members k. NTC l. Photonics 7) Review New Action Items: a. Tour to Niagara Falls Tunnels joint with Hamilton section (Greg, Padma) 8) Adjourn Next ExCom Meetings / Locations: October 10, Buffalo State University, Technology Building 148 at 6:30pm Room: 148, Bldg: Technology, 1300 Elmwood Avenue, Buffalo, New York, United States, 14222, Virtual: https://events.vtools.ieee.org/m/431932

IEEE NJ Coast Section - Executive Committee Meeting (September) (Virtual) Agenda: 1. Vote / Accept Meeting Minutes (Laura) and Vote to Approve Election Committee selection 2. Treasurer's Report (Mike) 3. Chair's Report(s) (Filomena) 4. Old Business (Each Chapter Chair) - Status of Each Chapter - Status of Committee's and Affinity Groups 5. New Business (Each Chapter Chair) - Each Chapters’ Upcoming Plans - Each Committee and Affinity Group Upcoming Plans - Any New Business not already covered - Move To Close Virtual: https://events.vtools.ieee.org/m/400528

[] Uncommons, 230 Thompson St, New York, New York, United States

Engineers traditionally use deterministic modeling in their tasks, but challenges for developing and optimizing products and processes inspire us to venture beyond deterministic to probabilistic or stochastic modeling. In this continuation from the prior presentation, a case study applying predictive engineering for the optimization of 4 requirements for an integrated circuit (Integrated Alternator Regulator for automobiles) will be shared. Deterministic models were derived by using design of experiments (DOE) and response surface modeling (RSM) in concert with circuit simulations. These deterministic models were melded with probabilistic modeling using Monte Carlo Simulation and Variance Transmission. Yield Surface Modeling™ will be introduced and shared and applied for stochastic co-optimization of the four requirements of the design. Brief summaries and overviews of other applications of predictive engineering to integrated circuit design stochastic optimization will be shared. [] Co-sponsored by: Ad Astra Foundation Speaker(s): Eric Maass, PhD Virtual: https://events.vtools.ieee.org/m/424630

Important: Please use your Zoom account (create one if you don't have) to register for the virtual event. https://sjsu.zoom.us/meeting/register/tZYvc-ygpzwqHd0I34ZDpWy2-9Sot_910anP Join us for the Third International Conference on Applied Data Science (ICADS 2024) , organized by the IEEE Computer Society of Santa Clara Valley. This virtual event brings together global innovators in data science to share cutting-edge research and practical applications. With keynote sessions, interactive workshops, and panel discussions covering topics related to GenAI and its application. ICADS 2024 offers a dynamic platform for innovation and collaboration. Don't miss this opportunity to connect with experts and advance the field of data science. Quantum Gate Neural Networks, Dr Siddhartha Bhattacharyya, India This talk is centered around the introduction to the implementation of neural networks in quantum computing frameworks. The talk starts with a brush-up on the operational principles of classical neural networks, followed by the TensorFlow Quantum Framework (TQF) - the basic building block of Quantum Neural Networks (QNNs). Then it delves into the details of Parameterized Quantum Circuits (PQCs). The Quantum Neural Network training model is also discussed with reference to TQF. Subsequently, it touches on the visualization of Quantum Convolutional Neural Networks (QCNNs). Finally, the advantages offered by QNNs over their classical counterparts are also highlighted. Digital twin in Aerospace Supply chain, Amit Dubey In this cutting-edge 1-hour workshop, we delve into the transformative potential of digital twin technology enhanced by machine learning in the aerospace supply chain. As the industry faces unprecedented challenges and opportunities, this session explores how this powerful combination is reshaping supply chain management, offering unparalleled improvements in efficiency, predictive maintenance, and decision-making processes using data science. Enabling Performance-Efficient GenAI at the Edge Through Quantization, Dwith Chenna The widespread adoption of Generative AI (GenAI) applications has sparked a revolution in the development of innovative solutions, it is expected that inference will account for 90% of the costs associated with GenAI applications, compared to only 10% for training. This cost disparity, along with the environmental impact of inference and data privacy concerns, has underscored the need for optimization at the edge. Quantization has emerged as a crucial technique, offering significant performance gains in computation and memory usage. In this presentation, we will delve into modern quantization techniques that facilitate the deployment of GenAI applications, such as large language models (LLMs), at the Edge. We will explore popular methods including AWQ, SmoothQuant, and Block Quantization, examining their trade-offs and optimizations. Using popular open-source models like Llama, OPT and Mistral, along with Llama.cpp, a well-regarded C++ implementation, as case study, we will analyze the impact of quantization on model performance for achieving overall efficiency in GenAI deployments. The Power and Perils of Generative AI: A Realistic Perspective, Professor San Murugesan In just two years, Generative AI (GenAI) has emerged as one of the most transformative technologies, revolutionizing industries, businesses, and personal interactions with its unprecedented capabilities in content creation, coding, and advisory services. This talk will explore GenAI's dual nature—its extraordinary potential and the significant risks it poses. We aim to provide participants with a balanced understanding of GenAI, empowering them to harness its power while effectively managing associated risks. We'll begin by highlighting applications for which GenAI is particularly well-suited and showcasing innovations reshaping sectors such as healthcare, education, business, research, and design. We will also address GenAI's limitations, including its reliance on vast data sets, its potential to generate biased or misleading information, and its ongoing technical challenges. The discussion will then shift to broader concerns, including ethical dilemmas, security vulnerabilities, and GenAI's societal impact. We'll also examine legal and regulatory issues, focusing on evolving frameworks around responsible AI-generated content, copyright, and regulations to mitigate GenAI's risks. Understanding and addressing these issues is not just a necessity, but a responsibility that we, as technology professionals, must uphold. Finally, we will explore GenAI's impact on cybersecurity—both as a tool for enhancing defenses and as a potential vector for new threats. We’ll also discuss emerging GenAI trends and how businesses and professionals can prepare for the GenAI era Accelerating Code Contribution with CodeBaseBuddy's Intelligent Semantic Search System, Raghavan Muthuregunathan Navigating and contributing to new codebases is a daunting challenge, especially for newcomers to open-source projects. Unlock the power of efficient code contribution with CodeBaseBuddy, a tool that's helping how developers tackle unfamiliar repositories. In this talk, we'll dive into the innovative combination of Retrieval Augmented Generation (RAG), Codestral, and Ollama to create a privacy-preserving, locally deployable semantic code search solution. Discover how this system accelerates onboarding, reduces errors, and enhances community engagement in open-source projects. CodeBaseBuddy provides step-by-step guidance and specific pointers for modifying files, transforming the experience of working with complex codebases. Whether you're a seasoned developer or new to the field, you'll learn how this tool can streamline your coding process and boost productivity. Join us to explore the future of collaborative coding and see firsthand how CodeBaseBuddy is making intricate codebases more accessible than ever before. Panel Discussion - AI and Social Media The convergence of artificial intelligence (AI) and social media has revolutionized the way businesses engage with their audience. By leveraging AI, companies can perform advanced audience analysis and optimize their content to maximize engagement. However, the same technology has also accelerated the spread of misinformation, highlighting the need for a balanced approach that weighs both the benefits and ethical risks.The panel will address critical questions around the benefits and impact of AI integration, the challenges of implementation, the opportunities for innovative applications, and the future trends shaping this rapidly evolving field. By bringing together experts from academia and industry, this discussion aims to shed light on strategic decision-making and policy development, offering valuable insights into the far-reaching implications of AI and social media convergence. Speaker(s): Amit Dubey, Professor San Murugesan, Dwith Chenna, Dr. Siddhartha Bhattacharyya, Vipul Bharat Marlecha, Aqsa Fulara, Anupam Mukherjee, Raghavan Muthuregunathan, Meenal Nalwaya Agenda: Agenda 09:00 -10:00 am: Quantum Gate Neural Networks 10:00 am - 11:00 am: Panel Discussion - AI and Social Media 11:00 - 12:00 pm Accelerating Code Contribution with CodeBaseBuddy's Intelligent Semantic Search System 12:00 - 01:00 pm Digital twin in Aerospace Supply chain 01:00 - 2:00 pm Enabling Performance-Efficient GenAI at the Edge Through Quantization 2:00 - 3:00 pm The Power and Perils of Generative AI: A Realistic Perspective Virtual: https://events.vtools.ieee.org/m/430463

The 12th Annual IEEE North Jersey Advanced Communications Symposium (NJACS-2024) will be held online (Zoom), on Saturday, September 14, 2024. The symposium consists of several keynote presentations. The symposium program will cover advanced topics in AI, deep learning, and LLM. This symposium is organized in collaboration with Canadian-American Research Forum on AI Technologies. Registration Required: https://events.vtools.ieee.org/m/430871 Conference Zoom Meeting ID: 506 875 4099 https://zoom.us/j/5068754099 Symposium Program 1:00-1:10PM Welcome Remarks Dr. Adriaan van Wijngaarden, Nokia Bell Labs Amit Patel, IEEE North Jersey ComSoc Chapter 1:10-1:15PM Opening Remarks - AI, Deep Learning, and LLM Prof. Yu-Dong Yao, Stevens Institute of Technology 1:15-2:00PM Unveiling Human Digital Twin (HDT) in the Era of 6G: A Paradigm Shift towards Human-Centric Services Jun Cai, Concordia University 2:00-2:45PM Deep Learning and Foundation Models in Wireless Research Yu-Dong Yao, Stevens Institute of Technology 2:45-3:30PM Empowering Pedagogical Agents through Foundational Models for Social Learning Ying (Gina) Tang, Rowan University 3:30-4:15PM Scientific Machine Learning: Applications and Challenges in the Realm of Experimental Particle Physics Yihui (Ray) Ren, Bookhaven National Laboratory 4:15-4:30PM Closing Remarks Dr. Adriaan van Wijngaarden, Nokia Bell Labs Registration IEEE member $ 00.00 Non-member $ 00.00 IEEE Student/Graduate Student/Life Member $ 00.00 Non-IEEE Student/Graduate Student $ 00.00 This event has limited seating and registration is required. Will close once the event reaches capacity. This symposium is being organized by the IEEE North Jersey Section and its Communications, Computer, Information Theory and Vehicular Technology Chapters. Technical support is provided by IEEE METSAC. Organizing Committee Symposium Chair Adriaan van Wijngaarden, Nokia Bell Labs Organization Chair Amit Patel, IEEE North Jersey ComSoc Chapter Program Chair Yu-Dong Yao, Stevens Institute of Technology Program Co-Chair Program Co-Chair Program Co-Chair Registration Chair Hong Zhao, Fairleigh Dickinson University Huaxia Wang, Rowan University Cherif Chibane, IEEE North Jersey Aerospace Chapter Michael Newell, IEEE North Jersey Section Virtual: https://events.vtools.ieee.org/m/430871

Course: 4 weeks, 1 class weekly, evening. Rates are listed below. September 16, 23, 30 and October 7, 2024. We can offer Continuing Education Units (CEU) and Professional Development Hours (PDH), if requested. A small fee may apply for the credits. Course Overview: Field-programmable gate arrays (FPGAs) are versatile integrated circuits that offer a flexible and reconfigurable hardware platform for implementing custom digital circuits, particularly in applications requiring specialized architectures. Unlike application-specific integrated circuits (ASICs), FPGAs can be programmed and reprogrammed after manufacturing using hardware description languages (HDLs), enabling rapid prototyping and iterative design processes. FPGAs can be found in telecommunications, signal processing, aerospace, and other scenarios demanding high-performance computing, parallel processing, low-latency data processing, and real-time operations. The newest trends include integrating FPGAs with systems on chip (SoCs) for implementing low-latency machine learning (ML) and artificial intelligence. This Advanced Digital Design course is an intensive program designed to build upon foundational concepts in digital logic design and equip students with the skills needed to implement robust high-speed ML algorithms on an FPGA. Through a combination of theoretical lectures, hands-on exercises, and practical projects, students will explore advanced FPGA topics encompassing architectural considerations, signal integrity, timing analysis, and optimization techniques to achieve reliable and efficient high-speed designs. Additionally, this course will encourage students to explore current research papers and real-world industry applications to foster a deeper appreciation for advancements in state-of-the-art FPGA design. Target audience: Students and professionals with a base knowledge of FPGA design looking to advance hardware design skills for developing complex customized circuits for efficient implementation of ML. Benefits of attending: - Valuable professional development creating skills that lead to job offers - Reinforce and expand knowledge of VHDL and FPGA-specific design methodology. - Develop skills for implementing high-speed, robust, reliable circuits on FPGAs. - Gain understanding of real-world industry applications of FPGAs and SoCs. Course Objectives: By the end of this course, students will possess the expertise needed to tackle complex high-speed hardware design challenges using FPGAs. They will be well-prepared to contribute to cutting-edge research, industry projects, and advancements in areas such as telecommunications, data centers, embedded systems, and high-performance computing. Prerequisites: - Understanding of digital logic design principles and methodology (e.g., Boolean algebra, finite state machines, data path elements) - Familiarity with VHDL programming (or Verilog) - Experience with FPGA development boards and tools (e.g., Vivado) Detailed Course Outline: - Review of Digital Logic Design and FPGA Programming - Boolean algebra, combinational and sequential circuits, finite state machines - FPGA, SoC, and SoM architectures and toolchains - VHDL programming techniques and design methodology - Writing effective testbenches, RTL simulation in Vivado - Introduction to ML algorithms and FPGA-specific optimization strategies - High-throughput Communication on FPGAs - Pipelining and parallelism for high-speed designs - Synchronous vs. asynchronous communication protocols (SPI, SCI, UART, LVDS, I2C, PCIe, USB, Ethernet, etc.) - Compare hardware/software/firmware implementations of ML: throughput speeds, resource utilization, and latency - Methods used to achieve ultra-high sampling rates (>> system clock, GS/s range) - Utilizing advanced IP cores and IO buffers for high-speed interfaces and data storage - Advanced FPGA Techniques for High-speed Systems - Clock domain crossing verification and synchronization techniques - Resource utilization, critical path identification, and optimization strategies - Timing constraints, static and dynamic timing analysis - Signal integrity analysis - High-Speed Design Verification and Testing - Simulation-based verification techniques, advanced debugging, and waveform analysis - Post-layout verification and back-annotation - Test and validation strategies for high-speed designs - Utilizing debug cores for real-time logic analysis - Machine Learning on FPGAs - Algorithm validation and verification in software - Compare capabilities and implementation strategies of ML on FPGAs, SoCs, and SoMs - Optimization strategies for efficient ML implementation in hardware (e.g., convolution) - Digital Systems in Industry - Techniques and best practices for scalable, reusable, reliable, and robust FPGA design - Board-level considerations for high-speed signals: PCB layout guidelines, power distribution and decoupling, transmission line theory and termination techniques - Emerging trends for FPGA-based digital signal processing (DSP) applications ________________________________________________________________________________________________ Early Rate ends on September 3, 2024 IEEE Members Early Rate: $120.00 IEEE Non-Members Early Rate: $250.00 Rates after September 3, 2024: IEEE Members: $140.00 IEEE Non-Members: $300.00 Decision to run the course is: Monday, September 9, 2024 Speaker(s): Kendall Farnham, PhD, Room: 2C130, Bldg: Center, MITRE Corporation and On-Line, 202 Burlington Road, Bedford , Massachusetts, United States, Virtual: https://events.vtools.ieee.org/m/371709

Agenda: Join us for the HKN Eminent Member for Dr Robert Woodrow Wilson and HKN Honorary Eminent Member Ceremony & Celebration on 17 September 2024 at 11.30am at AT&T Labs Science and Technology Innovation Center and Museum 200 South Laurel Ave Middletown New Jersey; A Day at the Museum with tours by Melissa Knoll AT&T Historian; Lunch with Leaders & Luminaries with Dr Robert Woodrow Wilson and many others; Ceremony and Presentations at 1pm. This is an extraordinary opportunity to join an HKN Eminent Member Ceremony & Celebration. Bldg: A, AT&T Science and Technology Innovation Center and Museum, 200 South Laurel Avenue , Middletown, New Jersey, United States, 07748

After work social networking event for Boston Young Professional Microwave Theory and Technology Society members or those who work in the field and are looking to make more professional connections. We encourage bringing business cards for exchanging contact information! Organizers will provide some pizza and appetizers based on expected head count. 3 Maguire Rd, Lexington, Massachusetts, United States, 02421

Use the power of tax diversification to help protect those who matter most and to potentially lower your tax burden in the future. Speaker(s): Alise Civello, John DiCalogero Agenda: IEEE-USA's free webinars/events are designed to help you find your next job, maintain your career, negotiate an appropriate salary, understand ethical considerations in the workplace and learn about other career-building strategies and public policy developments that affect your profession. Learn about our sponsor: the IEEE Member Group Insurance Program - Powered by AMBA. AMBA specializes in providing tailored insurance solutions for IEEE members. Whether you’re seeking health, life, or disability coverage, AMBA has you covered. Visit the IEEE Member Group Insurance Program website to explore the benefits and options available to you: (https://www.ieeeinsurance.com/) For information regarding upcoming webinars or to visit our vast webinar archive, please visit: (https://ieeeusa.org/careers/webinars/) (https://newsletter.smartbrief.com/rest/sign-up/2479DAB0-4089-43E7-925D-86AE0C1E6244?campaign=e0d52cef) Virtual: https://events.vtools.ieee.org/m/427444

September meeting. Please register for building access Agenda: TBA Room: 4th Flr, 1 Penn Plaza, New York, New York, United States, 10119, Virtual: https://events.vtools.ieee.org/m/428292

Section Officer Meeting: Closed Meeting between Chair, Vice-Chair, Secretary and Treasurer. Others by invitation. Project Echo Milestone Event Planning - meeting with Township Administrator. Virtual: https://events.vtools.ieee.org/m/433837

The Ithaca Executive Committee invites you to join us at Cornell University in (https://g.co/kgs/6dS2Rwn) 340 for a seminar on amateur radio presented by member, Kirk Smith. Refreshments will be served. The Cornell community is welcome to attend. After the seminar, the regular section meeting will take place. For non-Cornell attendees, free parking after 5 PM is available in the (https://maps.app.goo.gl/TJu15oLFF3hDdZJ4A). Agenda: - Event Planning - Section roles available: - Awards chair, event planner, webmaster, social media manager - Cornell IEEE chapter updates and/or events Room: 340, Bldg: Duffield, 343 Campus Rd, Ithaca, New York, United States, 14853

The Ithaca Executive Committee invites you to join us in (https://maps.app.goo.gl/HbpjjG6eywuynrbW9) 340 for a seminar on amateur radio presented by member and past secretary, Kirk Smith. Free parking is available after 5:00 PM in the (https://maps.app.goo.gl/XhpQLutjUCrFVFAx9), a 6 minute walk from Duffield Hall. Room 340 is the cantilevered room overlooking the engineering quad, pictured below. [] Agenda: - Event Planning - Collaboration between (https://afresearchlab.com/lablife/afrl-regional-network-mid-atlantic/) and the Ithaca section proposed. Potential networking event in the works. - Seminar on amateur radio on September 18, 2024 at Duffield Hall 340 from 6:00 to 7:30 PM - 2025 election preparations are underway - Vacant roles for 2025: Chair, vice chair, and secretary - Appointed roles: Awards chair, event planner, webmaster, social media manager - Cornell IEEE chapter updates and/or events - PCB Seminar: Arranging a PCB series for the fall of 2024. Room: 340, Bldg: Duffield Hall, 343 Campus Rd, Ithaca, New York, United States, 14853

ExCom NH Section monthly meeting - in person at the Airport Diner - please note 6pm start time to allow for dinner Airport Diner, 2280 Brown Avenue Manchester, NH 03103, Manchester, New Hampshire, United States, 03103

In response to the exponential growth of global data generation, IEEE has initiated two groundbreaking projects stemming from the IEEE/TA Data Strategy Ad Hoc committee. These initiatives harness IEEE's vast dataset resources to accelerate research and development, facilitate global data sharing, and create value for members and customers worldwide. The first project, IEEE DataPort, is a searchable repository of research datasets. Key features include: · Ability to link datasets to authors' IEEE publications · Open upload system for researchers · Metadata and quality screening process · Assignment of Digital Object Identifiers (DOIs) to datasets Dataport has a rapidly growing user base of over 8.5 million, with 20,000 new users daily. The second project is an AI/ML-powered search and knowledge engine that utilizes Natural Language Processing (NLP) and Retrieval Augmented Generation (RAG) technologies. The pilot program, "AskIEEE," allows users to pose questions in natural language and receive answers derived from IEEE's comprehensive information database. This presentation will showcase the capabilities and successes of these innovative projects, exploring their potential to expand IEEE's global reach and impact on the research community. Speaker(s): Rakesh Kumar Virtual: https://events.vtools.ieee.org/m/433006